Winbond W66BL6NB & W66CL2NQ 2Gb/4Gb LPDDR4 DRAM
Winbond W66BL6NB and W66CL2NQ 2Gb/4Gb LPDDR4 DRAM is offered in Single-Die-Package (SDP) and Dual-Die-Package (DDP). The Single-Die-Package (SDP) provides 16Mb x 16DQ x 8-banks x 1 channel with 2Gb (2,147,483,648 bits) density. The Dual-Die-Package (DDP) offers 16Mb x 16DQ x 8-banks x 2 channels with 4Gb (4,294,967,296 bits) density.
The Winbond W66BL6NB and W66CL2NQ 2Gb/4Gb LPDDR4 DRAM uses a 2 or 4 clock architecture on the Command/Address (CA) bus to reduce the number of input pins in the system. The 6-bit CA bus includes command, address, and bank information. Each command uses
1, 2, or 4 clock cycle, during which command information is transferred on the clock's positive edge.
Features
- VDD1 = 1.7V~1.95V
- VDD2/VDDQ = 1.06V~1.17V
- LPDDR4 uses 1.1V on VDDQ
- LPDDR4X uses 0.6V on VDDQ
- x16/x32 Data width
- Up to 2133MHz clock rate
- Up to 4267Mbps data rate
- 8 internal banks for concurrent operation
- 16n pre-fetch operation
- LVSTL_11 Interface
- 16, 32, On-the-fly 16 or 32 burst length
- Sequential burst type
- Programmable driver strength
- Coded command input in double clock edges
- Single data rate architecture on the CA bus
- Double data rate architecture on the DQ pins
- Differential clock input
- Bidirectional differential data strobe
- Input clock stop and frequency change
- On-die termination (ODT)
- Write leveling support
- Programmable Read and Write Latencies (RL/WL)
- CA training support
- DQ-DQS training
- Refresh feature:
- Auto refresh (per bank / all bank)
- Partial array self-refresh
- Auto temperature compensated self-refresh
- Post package repair
- Target row refresh mode
- Frequency-Set-Points for fast frequency switch
- Support write mask and data bus inversion (DBI)
- Support boundary scan for connectivity test
- WFBGA 200-Ball (10x14.5mm2) support package
- Operating Temperature Range:
- -40°C ≤ TCASE ≤ 95°C
- -40°C ≤ TCASE ≤ 105°C
Applications
- Handheld devices
- Consumer electronics
- Computer peripherals
Block diagram of single chip
Block diagram of Dual-Die-Package
Publicado: 2021-04-13
| Actualizado: 2026-01-15
