Volver a Texas Instruments

Texas Instruments AM263Px/AM263Px-Q1 Arm®-Based MCUs

Texas Instruments AM263Px/AM263Px-Q1 Arm®-Based Microcontrollers (MCUs) are built to meet the complex real-time processing needs of next-generation industrial and automotive embedded products. The AM263Px/AM263Px-Q1 MCU family comprises multiple pin-to-pin compatible devices with up to four 400MHz Arm Cortex®-R5F cores. The Arm R5F subsystem can be programmed to run in lockstep or dual-core mode for multiple functional safety configurations as an option. The industrial communications subsystem (PRU-ICSS) enables integrated industrial Ethernet communication protocols such as Ethernet/IP®, EtherCAT®, PROFINET® (among many others), standard Ethernet connectivity, and custom I/O interfaces. The family is designed for the future of digital power and motor control applications with advanced digital actuation and analog sensing modules.

The multiple R5F cores are arranged in cluster subsystems with 256KB of shared tightly coupled memory (TCM) and 3MB of shared SRAM, significantly reducing the need for external memory. Extensive ECC is included for enhanced reliability for on-chip memories, peripherals, and interconnects. The Hardware Security Manager (HSM) manages granular firewalls, enabling developers to implement stringent security-minded system design requirements. Secure boot and cryptographic acceleration are also available on the AM263Px devices. The Texas Instruments AM263Px-Q1 devices are AEC-Q100 qualified for automotive applications.

Features

  • Processor Cores
    • Single, dual, and quad-core Arm Cortex-R5F MCU with each core running up to 400MHz
      • 16KB I-cache with 64-bit ECC per CPU core
      • 16KB D-cache with 32-bit ECC per CPU core
      • x256 integrated VIM per CPU Core
      • 256KB Tightly-Coupled Memory (TCM) with 32-bit ECC per CPU core cluster
      • Lockstep or Dual-core capable clusters
    • Trigonometric Math Unit (TMU) for accelerating trigonometric functions
      • Up to 4x, one per R5F MCU core
  • Memory
    • 1x Flash Subsystem with OptiFlash memory technology and eXecute In Place (XIP) support
      • 1x Octal Serial Peripheral Interface (OSPI), up to 133MHz SDR and DDR
      • AM263P Flash-in-package (ZCZ_F) variant includes 8MB OSPI Flash
  • 3MB of on-chip RAM (OCSRAM)
    • Six Banks x 512KB
    • ECC error protection
    • Internal DMA engine support
    • Remote L2 cache for external memory, software programmable up to 128KB per CPU core
  • System-on-chip (SoC) services and architecture
    • 1x EDMA to support data movement functions
      • 2x Transfer Controllers (TPTC)
      • 1x Channel Controller (TPCC)
    • Device boot is supported from the following interfaces:
      • UART (Primary/Backup)
      • QSPI NOR Flash (4S/1S) (primary)
      • OSPI NOR Flash (8S 50MHz SDR Mode0, 8S 25MHz DDR XSPI) (primary)
    • Interprocessor communication modules
      • SPINLOCK module for synchronizing processes running on multiple cores
      • MAILBOX functionality implemented through CTRLMMR registers
    • Central Platform Time Sync (CPTS) support with time-sync and compare-event interrupt routers
    • Timer modules
      • 4x Windowed Watchdog Timer (WWDT)
      • 8x Real-Time Interrupt (RTI) timer
  • General connectivity
    • 6x Universal Asynchronous RX-TX (UART)
    • 8x Serial Peripheral Interface (SPI) controllers
    • 5x Local Interconnect Network (LIN) ports
    • 4x Inter-Integrated Circuit (I2C) ports
    • 8x Modular Controller Area Network (MCAN) modules with CAN-FD support
    • 4x Fast Serial Interface Transmitters (FSITX)
    • 4x Fast Serial Interface Receivers (FSIRX)
    • Up to 139 General-Purpose I/O (GPIO) pins
  • Sensing and actuation
    • Real-time Control Subsystem (CONTROLSS)
    • Flexible Input/Output Crossbars (XBAR)
    • 5x 12-bit Analog-to-Digital Converters (ADC)
      • 6-input SAR ADC up to 4MSPS
        • 6x single-ended channels OR
        • 3x differential channels
    • Highly configurable ADC digital logic
      • XBAR Start of Conversion Triggers (SOC)
      • User-defined Sample and Hold (S+H)
      • Flexible Post-Processing Blocks (PPB)
    • 1x resolver subsystem (ZCZ-S and ZCZ-F packages) with
      • 2x Resolver to Digital Converter (RDC) OR
      • 2x 12-bit ADCs can also be used for general purpose
        • 4-input SAR ADC up to 3MSPS
          • 4x single-ended channels OR
          • 2x differential channels
    • 10x analog comparators with Type-A programmable DAC reference (CMPSSA)
    • 10x analog comparators with Type-B programmable DAC reference (CMPSSB)
    • 1x 12-bit Digital-to-Analog Converter (DAC)
    • 32x Pulse Width Modulation (EPWM) modules
      • Single or Dual PWM channels
      • Advanced PWM configurations
      • Extended HRPWM time resolution
    • 16x Enhanced Capture (ECAP) modules
    • 3x Enhanced Quadrature Encoder Pulse (EQEP) modules
    • 2x 4-Ch Sigma-Delta Filter Modules (SDFM)
    • Additional signal-multiplex Crossbars (XBAR)
  • Industrial Connectivity
    • Programmable Real-Time Unit - Industrial Communication Subsystem (PRU-ICSS)
      • Dual-core Programmable Real-Time Unit Subsystem (PRU0 / PRU1)
        • Deterministic hardware
        • Dynamic firmware
    • 20-channel enhanced input (eGPI) per PRU
    • 20-channel enhanced output (eGPO) per PRU
    • Embedded peripherals and memory
      • 1x UART, 1x ECAP, 1x MDIO, 1x IEP
      • 1x 32KB shared general-purpose RAM
      • 2x 8KB shared data RAM
      • 1x 16KB IRAM per PRU
      • ScratchPad (SPAD), MAC/CRC
    • Digital encoder and sigma-delta control loops
    • The PRU-ICSS enables advanced industrial protocols, including:
      • EtherCAT, Ethernet/IP™,
      • PROFINET, IO-Link for order
    • Dedicated Interrupt Controller (INTC)
    • Dynamic CONTROLSS XBAR integration
  • High-speed interfaces
    • Integrated 3-port Gigabit Ethernet switch (CPSW) supporting up to two external ports
      • MII (10/100), RMII (10/100), or RGMII (10/100/1000)
      • IEEE 1588 (2008 Annex D, Annex E, Annex F) with 802.1AS PTP
      • Clause 45 MDIO PHY management
      • 512x ALE engine-based packet classifiers
      • Priority flow control with up to 2KB packet size
      • Four CPU hardware interrupt pacing
      • IP/UDP/TCP checksum offload in hardware
  • Security
    • Hardware Security Module (HSM) with support for Auto SHE 1.1/EVITA
      • Arm Cortex-M4F-based dedicated security controller
      • Isolated and secured RAMsPeripherals like timers, WWDT, RTC, interrupt controller
      • Safety-related peripherals like CRC, ESM, PBIST
    • Secure boot support
      • Device take-over protection
      • Hardware-enforced root-of-trust (RoT)
        • Support for two sets of RoT keys
      • Authenticated boot support
        • Encrypted boot support
      • SW Anti-rollback protection
    • Debug security
      • Secure device debug only after cryptographic authentication
      • Support for permanent debug/JTAG disable
    • Device ID and key management
      • Unique ID (SoC ID)
      • Support for OTP memory (FUSEROM)
    • Extensive firewall support
      • System Memory Protection Units (MPU) present at various interfaces
    • Cryptographic acceleration
      • Cryptographic cores with DMA Support
      • AES - 128/192/256-bit key sizes
      • SHA2 - 256/384/512-bit support
      • Deterministic random bit generator (DRBG) with pseudo and true random number generator (TRNG)
      • Public Key Accelerator (PKA) to assist in RSA/Elliptic Curve Cryptography (ECC) processing
  • Functional safety
    • Enables design of systems with functional safety requirements
      • Error Signaling Module (ESM) with designated SAFETY_ERRORn pin
      • ECC or parity on calculation-critical memories
      • 4x Dual Clock Comparators (DCC)
      • 3x Self-Test Controller (STC)
      • Programmable Built-In Self-Test (PBIST) and fault-injection for CPU and on-chip RAM
      • Runtime internal diagnostic modules, including voltage, temperature, and clock monitoring, windowed watchdog timers, CRC engines for memory integrity checks
    • Functional safety-compliant targeted [industrial]
      • Developed for functional safety applications
      • Documentation to be made available to aid IEC 61508 functional safety system design
      • Systematic capability up to SIL-3 targeted
      • Hardware integrity up to SIL-3 targeted
      • Safety-related certification
        • IEC 61508 planned
    • Functional safety-compliant targeted [automotive]
      • Developed for functional safety applications
      • Documentation to be made available to aid ISO 26262 functional safety system design
      • Systematic capability up to ASIL-D targeted
      • Hardware integrity up to ASIL-D targeted
      • Safety-related certification
        • ISO 26262 planned
  • Data storage
    • 1x 4-bit Multi-Media Card/Secure Digital (MMC/SD) interface
  • Optimal power management solution
    • Recommended TPS653860-Q1 Power Management ICs (PMIC)
      • Companion PMIC is specially designed to meet device power supply requirements
      • Flexible mapping and factory-programmed configurations to support different use cases
  • Technology/package
    • AEC-Q100 qualified for automotive applications
    • 45nm technology
    • ZCZ Package
      • AM263x Compatible (ZCZ-C)
        • Pin-to-pin compatible option with AM263x
      • AM263Px resolver (ZCZ-S)
        • Adds new resolver subsystem functionality
      • AM263Px resolver with Flash-in-package (ZCZ-F)
        • Includes 1x internally connected Silicon in Package (SIP) 64Mb ISSI IS25LX064-LWLA3 OSPI Flash device; up to 133MHz SDR and DDR
    • 324-pin NFBGA 15.0mm x 15.0mm x 0.8mm pitch

Applications

  • AC inverter and VF drives
  • Battery management systems
  • Combo box architectures
  • DC-DC converters
  • Domain controllers
  • EV charging
  • IO aggregators
  • Onboard chargers
  • Renewable energy storage
  • Single and multi-axis servo drives
  • Solar energy
  • Telematics
  • Traction inverters

Additional Resources

Functional Block Diagram

Block Diagram - Texas Instruments AM263Px/AM263Px-Q1 Arm®-Based MCUs

Related Development Tools

Texas Instruments DP83826-EVM-AM2 Evaluation Module (EVM)

Ethernet PHY add-on board for AM2x series Arm-based high-performance MCU  evaluation modules.

Learn Moreacerca de Texas Instruments DP83826-EVM-AM2 Evaluation Module (EVM) View Productsrelacionado con Texas Instruments DP83826-EVM-AM2 Evaluation Module (EVM)

Texas Instruments DP83TG720-EVM-AM2 Evaluation Module (EVM)

Ethernet PHY add-on board for AM2x series Arm®-Based high-performance MCU  evaluation modules.

Learn Moreacerca de Texas Instruments DP83TG720-EVM-AM2 Evaluation Module (EVM) View Productsrelacionado con Texas Instruments DP83TG720-EVM-AM2 Evaluation Module (EVM)

Texas Instruments TMDSCNCD263P-SIP Control Card Evaluation Module

The evaluation tool is for the AM263Px series Arm®-based high-performance microcontrollers.

Learn Moreacerca de Texas Instruments TMDSCNCD263P-SIP Control Card Evaluation Module View Productsrelacionado con Texas Instruments TMDSCNCD263P-SIP Control Card Evaluation Module
Publicado: 2024-06-26 | Actualizado: 2025-06-06