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Texas Instruments AFE3256 256-Ch Analog Front-Ends

Texas Instruments AFE3256 256-Ch Analog Front-Ends (AFEs) are developed to suit the requirements of flat-panel detector (FPD) based digital X-ray systems. The AFE3256 features 256 integrators, correlated double samplers (CDSs) with dual banking, and 256:2 analog multiplexers. The device contains two 16-bit successive-approximation register (SAR) analog-to-digital converters (ADCs). Serial data from the ADCs are offered in low-voltage differential signaling (LVDS) format.

The TI AFE3256, also commonly referred to as a readout integrated circuit (ROIC), optimizes the overall system performance using features such as multiple power modes and in-system debug options. The sleep and standby modes allow substantial power saving, which is critical for battery-powered systems.

Features

  • High performance:
    • Noise at 440 electrons RMS (1.2pC input charge range)
    • Low correlated noise
    • Full-channel integral nonlinearity of ±2LSB at 16-bit
    • Scan time of <16μs to 204.8μs
  • Integration:
    • Programmable full-scale input charge range of 0.3pC to 12.5pC with resolution of 0.3pC
    • Internal timing generator (TG)
    • Built-in correlated double sampler
    • Software programmable electron or hole integration mode
    • Pipelined integrate-and-read for improved throughput-data-read during integration
    • Serial LVDS output
    • On-chip temperature sensor
  • 256 channels
  • On-chip, 16-bit ADC
  • Simple power supply scheme of single 1.85V power supply operation
  • Multiple power modes with power consumption ranging from 1mW/ch to 2mW/ch
  • Power-down modes of sleep and standby
  • Binning mode support
  • Custom chip-on-film (COF) packages

Applications

  • Flat-panel X-ray detectors
  • Charge detectors
  • Capacitance measurement

Block Diagram

Block Diagram - Texas Instruments AFE3256 256-Ch Analog Front-Ends
Publicado: 2024-01-29 | Actualizado: 2024-07-18