STMicroelectronics SPC58 N Line Performance Microcontrollers

STMicroelectronics SPC58 N Line Performance Microcontrollers, based on Power Architecture® Technology, are designed for mission-critical automotive applications where stringent safety standards and real-time performance matter. Embedding three cores with a frequency of 200MHz each, and a 200MHz Generic Timer IP Module (GTM), the SPC58 N Line Performance MCUs are tailored for applications requiring high performance and even faster signal processing with minimum-to-no CPU load. Designed to meet the highest ASIL-D safety levels, the SPC58 N Line MCU family is ideal for advanced powertrain applications, Hybrid Electric Vehicles (HEV) and Electric Vehicles (EV) motor drives, electric power steering, active suspension applications, anti-lock braking, as well as Advanced Driving Assistance Systems (ADAS).

SPC58 N Line MCUs offer outstanding performance with up to 3 cores and up to 6Mbytes of embedded Flash memory as well as separate SAR and sigma-delta ADCs, ensuring speed, accuracy, and high-resolution sensing. These devices support high operating temperatures and ensure augmented connectivity through a rich set of communication interfaces, including Ethernet, FlexRay, CAN FD, LIN, and SENT.

An embedded Hardware Security Module (HSM) ensures robust in-vehicle network protection and secure software Over-the-Air updates against cyberattacks, supporting the EVITA Full profile. The GTM enables real-time control loops supporting advanced engine management and transmission applications.

Features

AEC-Q100 qualified
32-bit Power Architecture VLE compliant CPU cores
- Five enhanced main e200z4256n3 cores, dual-issue, two paired in lockstep
- Floating Point, End-to-End Error Correction
6576KB (6288KB code flash + 288KB data flash) on-chip flash memory
- Supports read during the program and erase operations, and multiple blocks allowing EEPROM emulation
- Supports read while reading between the two code Flash
128KB on-chip general-purpose SRAM (in addition to 384KB included in the CPUs)
96-channel direct memory access controller (eDMA)
Comprehensive new generation ASIL-D safety concept
- ASIL-D of ISO 26262
- FCCU for collection and reaction to failure notifications
- Memory Error Management Unit (MEMU) for collection and reporting of error events in memories
- Cyclic redundancy check (CRC) unit
Dual-channel FlexRay controller
Hardware Security Module (HSM)
GTM344 - generic timer module
- Intelligent complex timer module
- 144 channels (48 input and 96 output)
- 5 programmable fine-grain multi-threaded cores
- 61KB of dedicated RAM
- 24-bit wide channels

Enhanced analog-to-digital converter system with:
- 1 supervisor 12-bit SAR analog converter
- 2 separate 10-bit SAR analog converters
- 4 separate fast 12-bit SAR analog converters
- 6 separate 16-bit Sigma-Delta analog converters with programmable decimation filters
SAR ADC Queued digital interfaces for individual channel ordering and command sequencing
Communication interfaces
- 7 LINFlexD modules
- 8 deserial serial peripheral interface (DSPI) modules
- 7 modular controller area network (MCAN) modules, and one time-triggered controller area network (M-TTCAN), all supporting flexible data rate (ISO CAN-FD)
One Ethernet controller 10/100 Mbps, compliant IEEE 3-2008
Flexible Power Supply options
- External Regulators (1.2V core, 3.3V to 5V IO)
- Single internal SMPS regulator
Nexus development interface (NDI) per IEEEISTO 5001-2003 standard, with some support for 2010 standard
Boot assist Flash (BAF) supports factory programming using a serial bootload through the asynchronous CAN or LIN/UART
Junction temperature range: -40°C to +165°C
Package options
- LFBGA-292 (17.0mm x 17.0mm x 1.7mm)
- eLQFP-176 (24.0mm x 24.0mm x 1.4mm)